Special Instructions

Special instructions cover no-ops, inline native emission, memory fences, and register/memory pinning for liveness analysis.

NOP

Performs no operation. Used as a placeholder.

block->nop();

Emits an arbitrary native instruction into the instruction stream. Supports both a raw opcode byte and a string form.

Instruction	Operand 1	Operation
`VEMIT`	`Imm`	`emit raw opcode to stream`

block->vemit(0xCC);         // emit int3
block->vemits("int 3");     // same, via string

Symbolic memory-read fence - assumes all memory is read from. Prevents optimizations from reordering reads across this point.

block->sfence();

Symbolic memory-write fence - assumes all memory is written to. Prevents optimizations from reordering writes across this point.

block->lfence();

Pins a register for read and prevents optimization across that read dependency.

Instruction	Operand 1	Operation
`VPINR`	`Reg`	`pin OP1 (read)`

block->vpinr(X86_REG_AL);

Pins a register for write and prevents optimization across that write dependency.

Instruction	Operand 1	Operation
`VPINW`	`Reg`	`pin OP1 (write)`

block->vpinw(X86_REG_AL);

Pins a memory location for read using base register, displacement, and size. Prevents optimization across that memory read dependency.

Instruction	Operand 1	Operand 2	Operand 3	Operation
`VPINRM`	`Reg`	`Imm`	`Imm`	`pin [OP1+OP2]:OP3 (read)`

block->vpinrm(REG_SP, 3ull, 64);

Pins a memory location for write using base register, displacement, and size. Prevents optimization across that memory write dependency.

Instruction	Operand 1	Operand 2	Operand 3	Operation
`VPINWM`	`Reg`	`Imm`	`Imm`	`pin [OP1+OP2]:OP3 (write)`

block->vpinwm(REG_SP, 3ull, 64);